Defensa de tesi de Ricard Núñez

Doctorand: Ricardo Núñez Prieto.

Títol: Design and Optimization of a Low-Power RISC-V Processor for NDIR Measurement of CO2 Levels.

Directors: Lluís Terés / David Castells

Tutor: Lluís Terés

Data i hora lectura: 18/12/2023, 10:00h.

Lloc lectura: Sala d'Actes de l’Escola de Postgrau.

Programa de Doctorat: Enginyeria Electrònica i de Telecomunicació.

Departament on està inscrita la tesi: Institut de Microelectrònica de Barcelona (IMB-CNM).

 

Abstract

In various fields like environmental monitoring, healthcare, and the IoT, the increasing demand for low-power devices has led to growing interest in the development of energy-efficient processors. In this ongoing quest for high-performance and energy-efficient processors, the RISC-V architecture emerges as a promising solution. In recent years, the RISC-V architecture has gained popularity as an open-source and customizable alternative to proprietary instruction set architectures (ISAs).
This thesis presents the comprehensive design, implementation, and performance analysis of RisCO2, a custom-designed soft-core RISC-V processor. It is specially optimized for energy-efficient IoT devices, with a focus on its feasibility for Non-Dispersive Infrared (NDIR) CO2 sensors in environmental monitoring and air quality control. The design process builds on the extensible and modular architecture of the RISC-V instruction set to develop a processor core that is tailored for low-power applications. Moreover, RisCO2 has been integrated into the PULPino SoC, providing a comprehensive system for evaluating energy efficiency.
The methodology employs an iterative design process using an FPGA implementation that incrementally incorporates architectural modifications aimed at reducing both power consumption and computation time, all without sacrificing performance. The process began with a basic RV32I core, allowing us to understand the fundamental characteristics of the RISC-V ISA as well as to acknowledge the flexibility provided by its modular design. As the project progressed, we selectively incorporated more specialized extensions and functional units into the processor. 
We have placed heavy emphasis on the design's verification and validation. Through RTL simulations, we confirmed the processor's compliance with RISC-V ISA specifications and its functional integrity. In subsequent design stages, we engaged in a careful process to prune superfluous hardware logic and simplify RTL modules, streamlining the processor's architecture while also reducing both area and energy consumption.
The application used for benchmarking the processor employs the well-known digital quadrature demodulation technique to extract information from the sensor's digital samples. It then calculates the CO2 concentration based on the Beer-Lambert law, which governs the behavior of light absorption in gases. Additionally, the study conducts a comparative analysis with established RISC-V reference processors: Ri5cy, CV32E40P, Zero-riscy, and Micro-riscy. This comparison aims to assess how RisCO2 performs when integrated into real-world SoC frameworks like PULPino, providing a more comprehensive perspective on the design of energy-efficient processors. To perform this assessment, distinct projects were created targeting each of these reference processors. Through this approach, the processor's performance, resource utilization, and power consumption were scrutinized in detail.
Following implementation, in-depth power breakdown analyses were conducted using switching activity data from circuit nets, offering precise estimates of power consumption. This examination provided insights into how power consumption is distributed across the various processor modules. Finally, synthesis and area utilization were analyzed using TSMC's 65nm process technology library, utilizing the Cadence Genus synthesis tool for the assessment.

The results show that RisCO2 achieves a significant reduction in energy consumption while delivering performance comparable to that of the reference processors. These findings highlight the capability of custom RISC-V processors like RisCO2 to serve as effective solutions in gas concentration sensing applications. 
In summary, this work contributes to the ongoing efforts aimed at improving processor energy efficiency and promoting sustainable computing, offering both a methodological approach and empirical data that can guide the development of high-performance, low-power processors.