Defensa de tesi de Ashkan Rezaee

Doctorand: Ashkan Rezaee.

Títol: Dual-Gate OTFTs and Multiplexer Chips: Advancing the Next Generation of Flexible EG-ISFET Sensor Chips.

Directors: Jordi Carrabina Bordoll

Data i hora lectura: 15/09/2023, 11:00h.

Lloc lectura: Sala de Graus de l’Escola de Postgrau.

Programa de Doctorat: Enginyeria Electrònica i de Telecomunicació.

Departament on està inscrita la tesi: Departament de Microelectrònica i Sistemes Electrònics.

 

Abstract

This research focuses in the development of innovative sensor circuit architectures and design that combines extended gate ISFET sensors and multiplexers using dual gate OTFTs. This breakthrough opens up new possibilities for the implementation of flexible and environmentally friendly sensor chips. The integration of multiplexing functionality enables the selection of different gains and sensitivities, as well as the ability to replace damaged devices, enhancing the overall versatility and reliability of the sensor system.

One key advantage of our approach is the simplified and cost-effective fabrication process of OTFTs compared to traditional silicon-based technologies. The absence of CMOS processes in the organic domain necessitates the use of dual-gate OTFTs to construct multiplexers capable of blocking signals from inactive ISFETs while processing the active ones. The Smartkem 2.5-micron process offers a viable fabrication solution for these dual-gate OTFTs. Furthermore, the use of digital patterning eliminates the need for fabricating masks, reducing non-recurring engineering costs associated with the manufacturing process.